Name: Strategies to Reduce Power during VLSI Circuit Testing: Reduction of Dynamic and Leakage Power during Testing of Digital VLSI Circuits
Brand: Subhadip Kundu
SKU: ID13025143
Availability: InStock

Strategies to Reduce Power during VLSI Circuit Testing: Reduction of Dynamic and Leakage Power during Testing of Digital VLSI Circuits

49.00 EUR

Ein praxisnahes Buch, das neue Techniken zur Senkung von dynamischer und Leckageleistung in VLSI-Testschaltungen erläutert, mit anschaulichen Beispielen aus der Praxis und Schritt‑für‑Schritt‑Anleitungen.

Gesponsert

Strategies to Reduce Power during VLSI Circuit Testing, Fachbücher

Galaxus.de

49.00 EUR

30-04-2026 12:25:06

Strategies to Reduce Power during VLSI Circuit Testing: Reduction of Dynamic and Leakage Power during Testing of Digital VLSI Circuits

Strategies to Reduce Power during VLSI Circuit Testing, Fachbücher

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